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For the Inventor, By the Inventor

Palo Alto, CA, United States of America

Sanjay Dabral

USPTO Granted Patents = 90 


Average Co-Inventor Count = 2.9

ph-index = 14

Forward Citations = 1,279(Granted Patents)

Forward Citations (Not Self Cited) = 1,236(Dec 10, 2025)


Inventors with similar research interests:


Location History:

  • Milipitas, CA (US) (1999 - 2000)
  • Milpitas, CA (US) (1998 - 2006)
  • Palo Alta, CA (US) (2010)
  • Palto Alto, CA (US) (2014)
  • Pala Alto, CA (US) (2009 - 2019)
  • Palo Alto, CA (US) (2001 - 2020)

Company Filing History:

goldMedal83 out of 54,750 
 
Intel Corporation
 patents
silverMedal3 out of 3 
 
Planar Labs Corporation
 patents
bronzeMedal2 out of 38 
 
Rainbow Displays, Inc.
 patents
4. 2 out of 832,843 
Other
 patents

Years Active: 1998-2020

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Areas of Expertise:
Link Power Savings
Dynamically Modulating Link Width
I/O Link Configuration
Error Detection Techniques
Lane Virtualization
Clock Failure Detection
High Speed Interconnect
Programmable Passive Equalizer
Circuit Board Design
Data Stream Error Correction
Phase-Locked Loop Circuit
Signal Path Optimization
90 patents (USPTO):Explore Patents
1. 10712809 - Link power savings with state retention (2020-07-14),
2. 10175744 - Link power savings with state retention (2019-01-08),
3. 9794349 - Dynamically modulating link width (2017-10-17),
4. 9588575 - Link power savings with state retention (2017-03-07),
5. 8914541 - Dynamically modulating link width (2014-12-16),
6. 8831666 - Link power savings with state retention (2014-09-09),
7. 8315347 - I/O link with configurable forwarded and derived clocks (2012-11-20),
8. 8250416 - Redundant acknowledgment in loopback entry (2012-08-21),
9. 8204067 - Technique for lane virtualization (2012-06-19),
10. 8195996 - Apparatuses, systems and methods for detecting errors in data streams on point-to-point serial links (2012-06-05),
11. 8143911 - Input/output driver swing control and supply noise rejection (2012-03-27),
12. 8046488 - Dynamically modulating link width (2011-10-25),
13. 7957428 - Methods and apparatuses to effect a variable-width link (2011-06-07),
14. 7917828 - Providing error correction coding for probed data (2011-03-29),
15. 7907418 - Circuit board including stubless signal paths and method of making same (2011-03-15),

Hello! I'm pleased to present an article about the innovative inventor, Sanjay Dabral, whose remarkable work in the field of technology has left a lasting impact on the industry.

Title: The Trailblazing Innovations of Sanjay Dabral: A Pioneer in Technology.

Introduction: Sanjay Dabral, based in the vibrant tech hub of Palo Alto, CA, is renowned for his relentless pursuit of innovation and his dedication to pushing the boundaries of technology.

Latest Patents: With an impressive portfolio of 90 patents, one of his latest inventions includes "Link Power Savings with State Retention," which revolutionizes the management of power consumption in devices coupled via a serial link.

Career Highlights: Sanjay Dabral's illustrious career includes significant contributions at esteemed companies like Intel Corporation and Planar Labs Corporation, where he spearheaded projects that have redefined technological possibilities.

Collaborations: Throughout his career, Sanjay has collaborated with visionaries such as Tim Frodsham and Theodore Zale Schoenborn, further solidifying his reputation as a team player and a driving force behind groundbreaking innovations.

Conclusion: Sanjay Dabral's innovative spirit and commitment to excellence continue to inspire a new generation of inventors and innovators to think creatively and shape a brighter future through technology.

I hope this article captures the essence of Sanjay Dabral's remarkable journey in the world of technology. If you need any more information or have any specific requests, feel free to let me know!

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