This inventor holds 1 USPTO granted patent. Top assignee: Mediatek Singapore Pte. Ltd.. Active years: 2026.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile
Company Filing History:
Years Active: 2026
Title: Sagar Y Abachi: Memory-Circuit Inventor
Introduction
Sagar Y Abachi is an inventor associated with Bengaluru, India. His listed patent work concerns a low-power read circuit for multi-bank memory. He is associated with MediaTek Singapore Pte. Ltd. The available information lists 1 patent.
Latest Patents
Abachi’s listed patent, “Low Power Read Circuit for Multi-Bank Memory,” describes a memory architecture that connects far and near banks through local and global bitlines. A NAND gate combines signals from the near-bank local bitlines and a far global bitline, with its output connected to a near global bitline. A global input/output circuit then uses that line to output data. The design focuses on a read-circuit arrangement for multi-bank memory.
Career Highlights
The available details connect Abachi’s patent activity with MediaTek Singapore Pte. Ltd. His listed invention addresses memory-circuit design and low-power data reading.
Collaborations
The provided information names Jaswinder Singh Sidhu and Manish Trivedi as Abachi’s coworkers. It does not specify whether they collaborated with him on the listed patent.
Conclusion
Sagar Y Abachi’s listed patent documents an approach to reading data from multi-bank memory using interconnected bitlines and a NAND gate.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile