The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 06, 2026

Filed:

Aug. 26, 2024
Applicant:

Mediatek Singapore Pte. Ltd., Singapore, SG;

Inventors:

Jaswinder Singh Sidhu, Bengaluru, IN;

Manish Trivedi, Bengaluru, IN;

Sumanth Katte Gururajarao, San Jose, CA (US);

Sagar Y Abachi, Bengaluru, IN;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 11/418 (2006.01); G11C 11/419 (2006.01);
U.S. Cl.
CPC ...
G11C 11/418 (2013.01); G11C 11/419 (2013.01);
Abstract

A multi-bank memory includes: a pair of far banks coupled to a first word line and a first pair of local bitlines, respectively; a pair of near banks coupled to a second word line and a second pair of local bitlines, respectively; a far global bit line coupled to the first pair of local bitlines; a first NAND gate having a first input coupled to the second pair of local bitlines and a second input coupled to the far global bit line; a near global bit line coupled to the output of the first NAND gate; and a global input/output (I/O) circuit, coupled to the near global bit line, for outputting data.


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