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San Jose, CA, United States of America

Rochit Rajsuman

This inventor holds 5 USPTO granted patents and 1 published patent application. Top assignee: Lsi Logic Corporation. Active years: 1997-2000.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Rochit Rajsuman. Retrieved from https://idiyas.com/inventor/rochit-rajsuman-pza42299

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 5 (Patent Applications = 1)

% Patents Active = 100.0

Average Co-Inventor Count = 1.7

ph-index = 5

Forward Citations = 80(Granted Patents)

Company Filing History:

Lsi Logic Corporation

Years Active: 1997-2000

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5 patents (USPTO):Sort by Forward CitationsExplore Patents

1. 6108805 - Domino scan architecture and domino scan flip-flop for the testing of (2000-08-22),

2. 5963566 - Application specific integrated circuit chip and method of testing same (1999-10-05),

3. 5867036 - Domino scan architecture and domino scan flip-flop for the testing of (1999-02-02),

4. 5670890 - Switchable pull-ups and pull-downs for IDDQ testing of integrated (1997-09-23),

5. 5644251 - Switchable pull-ups and pull-downs for IDDQ testing of integrated (1997-07-01),

Profile summary based on public USPTO records.

Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]

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