Buda, TX, United States of America

Robin K Mitra

This inventor holds 1 USPTO granted patent and 1 published patent application. Top assignee: Micron Technology Incorporated. Active years: 2026.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Robin K Mitra. Retrieved from https://idiyas.com/inventor/robin-k-mitra-tenyw1km

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 1 

% Patents Active = 100.0

Average Co-Inventor Count = 3.0

ph-index = 1


Company Filing History:


Years Active: 2026

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1 patent (USPTO):Explore Patents

Title: Robin K. Mitra and Memory Failure Indicators.

Introduction

Robin K. Mitra is an inventor based in Buda, Texas, and works at Micron Technology Incorporated. His patent work includes a system for identifying failures in memory systems through visual indicators.

Latest Patents

Mitra is associated with 1 patent, titled “Memory with Fail Indicators, Including Memory with LED Fail Indicators, and Associated Systems, Devices, and Methods.” The invention describes memory systems connected to a host device, with at least one system featuring a fail indicator linked through a side channel. The host can detect a failure and activate the indicator. The side channel may use I2C or I3C, and an LED can provide a visual signal. Its color may indicate the failure’s type, occurrence, or location.

Career Highlights

Mitra’s patent reflects work on making memory-system failures easier to identify. By enabling a host device to activate a visual indicator, the disclosed approach can help users recognize and locate issues in a memory system.

Collaborations

Mitra’s listed coworkers include Aaron Jannusch and Mow Yiak Goh. The patent describes a system involving memory devices and a host device, though the provided information does not specify the coworkers’ roles in the invention.

Conclusion

Robin K. Mitra’s patent focuses on practical failure detection, using host-controlled visual indicators to make memory-system issues more apparent.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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