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For the Inventor, By the Inventor

Ponte San Pietro, Italy

Roberto Ravasio

This inventor holds 23 USPTO granted patents and 7 EPO patents, primarily in Flash Memory Technology. Top assignees: Stmicroelectronics S.r.l., Micron Technology Incorporated, Hynix Semiconductor Inc.. Active years: 2005-2020.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Roberto Ravasio. Retrieved from https://idiyas.com/inventor/roberto-ravasio

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 23

% Patents Active = 91.3


Average Co-Inventor Count = 3.1

ph-index = 8

Forward Citations = 148(Granted Patents)


Location History:

  • Carvico, IT (2005 - 2007)
  • Ponte San Pietro (BG), IT (2008 - 2010)
  • 24030 Presezzo, IT (2010)
  • Ponte San Pietro, IT (2008 - 2013)
  • Ponte S. Pietro, IT (2008 - 2020)

Company Filing History:

goldMedal12 out of 5,691 
 
Stmicroelectronics S.r.l.
 patents
silverMedal5 out of 39,222 
 
Micron Technology Incorporated
 patents
bronzeMedal2 out of 6,228 
 
Hynix Semiconductor Inc.
 patents
4. 5 out of 834,513 
Other
 patents
where one patent can have more than one assignee

Years Active: 2005-2020

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Areas of Expertise:
Error Correction
Flash Memory
NAND Architecture
Non-Volatile Memory
Memory Device
Embedded Error-Correcting Code
Memory System
Programming Method
Multilevel Cells
Capacitive Coupling
Page Buffer Circuit
Semiconductor Memory
23 patents (USPTO):Explore Patents
1. 10630317 - Method for performing error corrections of digital information codified as a symbol sequence (2020-04-21),
2. 8966335 - Method for performing error corrections of digital information codified as a symbol sequence (2015-02-24),
3. 8572361 - Configuration of a multilevel flash memory device (2013-10-29),
4. 8347201 - Reading method of a memory device with embedded error-correcting code and memory device with embedded error-correcting code (2013-01-01),
5. 8065467 - Non-volatile, electrically-programmable memory (2011-11-22),
6. 7937576 - Configuration of a multi-level flash memory device (2011-05-03),
7. 7908543 - Reading method of a memory device with embedded error-correcting code and memory device with embedded error-correcting code (2011-03-15),
8. 7730357 - Integrated memory system (2010-06-01),
9. 7719894 - Method of programming cells of a NAND memory device (2010-05-18),
10. 7581153 - Memory with embedded error correction codes (2009-08-25),
11. 7529136 - Method for compacting the erased threshold voltage distribution of flash memory devices during writing operations (2009-05-05),
12. 7394694 - Flash memory device with NAND architecture with reduced capacitive coupling effect (2008-07-01),
13. 7382660 - Method for accessing a multilevel nonvolatile memory device of the flash NAND type (2008-06-03),
14. 7366014 - Double page programming system and method (2008-04-29),
15. 7362616 - NAND flash memory with erase verify based on shorter evaluation time (2008-04-22),

Title: Innovations and Contributions of Roberto Ravasio

Introduction

Roberto Ravasio, an accomplished inventor based in Ponte San Pietro, Italy, has made significant contributions to the field of digital information and error correction systems. With an impressive portfolio of 23 patents, his work showcases a strong commitment to advancing technology and improving the efficiency of digital communication.

Latest Patents

Among Ravasio's latest innovations is a groundbreaking method for performing error corrections of digital information codified as a symbol sequence. This method and system focus on enhancing the reliability of digital information stored in electronic memory systems or transmitted to and from these systems. Specifically, the invention facilitates the transmission of sequences that incorporate a portion of error corrector code. By employing the calculation of an error syndrome using a parity matrix, the system can restore the sequence that is most likely the original transmission. Notably, the embodiments of this invention utilize an error code that belongs to a non-Boolean group, allowing for greater flexibility and efficiency in data transmission.

Career Highlights

Roberto Ravasio has had a distinguished career with notable roles at various high-tech companies. He served at STMicroelectronics S.r.l., where his work in semiconductor technology paved the way for numerous advancements in digital systems. Additionally, his tenure at Micron Technology Incorporated further enriched his experience in the field of memory solutions, proving essential to his development as an inventor.

Collaborations

Throughout his career, Ravasio has collaborated with talented professionals, including Rino Micheloni and Angelo Bovino. These partnerships have enhanced his projects and contributed to the overall development of innovative solutions in the technology sector.

Conclusion

Roberto Ravasio's extensive experience and patent portfolio underscore his dedication to innovation in digital systems and error correction methodologies. His work continues to influence the industry, demonstrating the importance of collaboration and advanced technology in today's digital landscape. Through his inventions, he has made significant strides in ensuring more reliable and efficient communication in an increasingly digital world.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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