Phoenix, AZ, United States of America

Robert P Lorigan

This inventor holds 1 USPTO granted patent. Top assignee: Motorola Corporation. Active years: 1989.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Robert P Lorigan. Retrieved from https://idiyas.com/inventor/robert-p-lorigan

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank

% Patents Active = 100.0

Average Co-Inventor Count = 3.0

ph-index = 1

Forward Citations = 9(Granted Patents)


Company Filing History:


Years Active: 1989

Loading Chart...
1 patent (USPTO):Explore Patents

Title: The Innovations of Robert P. Lorigan

Introduction

Robert P. Lorigan is a notable inventor based in Phoenix, AZ. He has made significant contributions to the field of semiconductor technology. His work primarily focuses on methods that enhance the purity of silicon beams used in various applications.

Latest Patents

Robert P. Lorigan holds a patent for a method titled "Method for determining silicon (mass 28) beam purity prior to implanting gallium arsenide." This innovative method involves implanting silicon in a silicon monitor wafer and analyzing the damage created by the implantation. This technique is crucial for ensuring the quality and effectiveness of semiconductor devices.

Career Highlights

Lorigan has had a distinguished career at Motorola Corporation, where he has applied his expertise in semiconductor technology. His work has contributed to advancements in the industry, particularly in the area of silicon purity and its implications for device performance.

Collaborations

Throughout his career, Robert has collaborated with esteemed colleagues such as Syd R. Wilson and Richard L. Peterson. These partnerships have fostered innovation and have led to significant advancements in their respective fields.

Conclusion

Robert P. Lorigan's contributions to semiconductor technology and his innovative patent demonstrate his commitment to advancing the industry. His work continues to influence the development of high-quality semiconductor devices.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
Loading…