Newton, MA, United States of America

Robert Maher

This inventor holds 1 USPTO granted patent. Top assignee: Analog Devices,inc.. Active years: 2013.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Robert Maher. Retrieved from https://idiyas.com/inventor/robert-maher-27mgfmvq

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank

Average Co-Inventor Count = 4.0

ph-index = 1

Forward Citations = 1(Granted Patents)


Company Filing History:


Years Active: 2013

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1 patent (USPTO):Explore Patents

Title: Robert Maher: Inventor of a Variable-Pattern Lithography Method

Introduction

Robert Maher is an inventor associated with Newton, Massachusetts, and Analog Devices, Inc. His patent work describes a method for forming variable patterns across a wafer using a reticle.

Latest Patents

The provided information lists one patent for Maher: Method of Forming Variable Patterns Using a Reticle. The method forms repeated first and second patterns on a wafer, each containing a readable element. By incrementally misaligning successive second patterns relative to corresponding first patterns, the process creates a series of variable patterns from the paired readable elements. The available information does not specify the patent’s filing or grant date.

Career Highlights

Maher’s listed invention concerns pattern formation on wafers, a process relevant to semiconductor manufacturing. His association with Analog Devices, Inc. connects his work to a company that develops semiconductor products and related technologies. The supplied information does not detail his specific role or career history.

Collaborations

The provided data names Francis J. McNally and Lee James Jacobson as Maher’s coworkers. It does not establish whether they collaborated with him on this patent.

Conclusion

Robert Maher’s listed patent presents a method for producing variable wafer patterns through controlled alignment and incremental misalignment, highlighting his documented contribution to semiconductor-related innovation.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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