Robert Lamoon

Title: Innovations by Robert Lamoon in Stress Relief Solutions

Introduction

Robert Lamoon is an accomplished inventor based in Portishead, GB. He has made significant contributions to the field of semiconductor technology, particularly in the design of wafer level chip scale packages. His innovative approach has led to the development of solutions that address stress relief in large copper plane designs.

Latest Patents

Robert Lamoon holds a patent for "Stress relief solutions on WLCSP large/bulk copper plane design." This patent describes a wafer level chip scale package that includes at least one redistribution layer connected to a wafer through an opening in a first polymer layer. The design features a roughened top surface on the redistribution layer and strategically placed holes to enhance performance. The patent emphasizes the importance of cohesion between polymer layers and adhesion between the redistribution layer and the second polymer layer.

Career Highlights

Robert is currently employed at Dialog Semiconductor (UK) Limited, where he continues to innovate in the semiconductor industry. His work focuses on enhancing the reliability and performance of chip designs, contributing to advancements in technology.

Collaborations

Throughout his career, Robert has collaborated with notable colleagues, including Ian Kent and Rajesh Subraya Aiyandra. These partnerships have fostered a creative environment that encourages the exchange of ideas and expertise.

Conclusion

Robert Lamoon's contributions to the field of semiconductor technology, particularly through his patent on stress relief solutions, highlight his innovative spirit and dedication to advancing the industry. His work continues to influence the design and functionality of modern chip technologies.