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For the Inventor, By the Inventor

Plano, TX, United States of America

Robert J Landers

USPTO Granted Patents = 16

Average Co-Inventor Count = 2.4

ph-index = 5

Forward Citations = 86(Granted Patents)


Location History:

  • Plano, TX (US) (1995 - 1998)
  • Allen, TX (US) (2005 - 2017)

Company Filing History:

goldMedal15 out of 29,232 
 
Texas Instruments Corporation
 patents
silverMedal1 out of 832,680 
Other
 patents

Years Active: 1995-2017

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16 patents (USPTO):Explore Patents
1. 9692446 - Delta-Sigma ADC with wait-for-sync feature (2017-06-27),
2. 8549338 - Low-power data loop recorder (2013-10-01),
3. 8423837 - High reliability and low power redundancy for memory (2013-04-16),
4. 7466576 - Technique for CAM width expansion using an external priority encoder (2008-12-16),
5. 6930953 - Self-timed strobe generator and method for use with multi-strobe random access memories to increase memory bandwidth (2005-08-16),
6. 5789956 - Low power flip-flop (1998-08-04),
7. 5751162 - Field programmable gate array logic module configurable as combinational (1998-05-12),
8. 5654981 - Signal transmission system and method of operation (1997-08-05),
9. 5612632 - High speed flip-flop for gate array (1997-03-18),
10. 5535241 - Signal transmission system and method of operation (1996-07-09),
11. 5502404 - Gate array cell with predefined connection patterns (1996-03-26),
12. 5488315 - Adder-based base cell for field programmable gate arrays (1996-01-30),
13. 5469079 - Flip-flop for use in LSSD gate arrays (1995-11-21),
14. 5428304 - Programmable gate array with special interconnects for adjacent gates (1995-06-27),
15. 5422581 - Gate array cell with predefined connection patterns (1995-06-06),

Title: The Innovations of Robert J. Landers

Introduction

Robert J. Landers is a notable inventor based in Plano, TX, with a remarkable portfolio of 16 patents. His work primarily focuses on integrated circuit technology and low-power data systems, showcasing his expertise in the field of electronics and data management.

Latest Patents

Among his latest innovations is the Delta-Sigma ADC with a wait-for-sync feature. This integrated circuit (IC) chip incorporates a Delta-Sigma filter module for an analog-to-digital converter. The design includes a filter that processes a digital data stream generated by a modulator, providing a multibit data value when a counter reaches a predetermined number of bits. Additionally, it features a FIFO buffer that stores the multibit data value only when a synchronization flag is active, sending an interrupt to a processing unit after a specific number of values are stored. Another significant patent is the low-power data loop recorder, which captures pre- and post-event data for random occurrences while minimizing power consumption. This system continuously records real-time data in a memory segment and activates a second memory upon detecting a designated event to store post-event data.

Career Highlights

Robert has had a distinguished career, working with prominent companies such as Texas Instruments Corporation. His contributions to the field have been recognized through his numerous patents and innovative designs.

Collaborations

Throughout his career, Robert has collaborated with talented individuals, including Shivaling S. Mahant-Shetti and Mark G. Harward. These partnerships have further enhanced his work and contributions to the industry.

Conclusion

Robert J. Landers exemplifies innovation in the field of electronics through his patents and collaborative efforts. His work continues to influence advancements in integrated circuits and data management systems.

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