The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 26, 1996

Filed:

Apr. 28, 1995
Applicant:
Inventors:

Robert J Landers, Plano, TX (US);

Shivaling S Mahant-Shetti, Dallas, TX (US);

R Krishman, Ganganagar, IN;

C Mutukrishnan, Ganganagar, IN;

Assignee:
Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L / ; H03K / ;
U.S. Cl.
CPC ...
326 50 ; 326 41 ; 326 45 ;
Abstract

A base cell for a CMOS gate array is provided with a plurality of N-channel transistors 10, 12, 14 with all such N-channel transistors coupled in series. A plurality of P-channel transistors 16, 18 coupled in series. These transistors are interconnected at the transistor level to form a partially prewired circuit. Specifically, the gates of two of the N-channel transistors 12, 14 are connected by polysilicon lead 28 to the gate of transistor 16. This configuration forms a circuit primitive which is well adapted for use as a base cell in a programmable array device.


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