logo

For the Inventor, By the Inventor

Scotts Valley, CA, United States of America

Robert D Patrie

This inventor holds 17 USPTO granted patents, primarily in Programmable Logic Testing. Top assignee: Xilinx, Inc.. Active years: 2000-2007.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Robert D Patrie. Retrieved from https://idiyas.com/inventor/robert-d-patrie

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank
USPTO Granted Patents = 17

% Patents Active = 82.4

Average Co-Inventor Count = 4.0

ph-index = 14

Forward Citations = 408(Granted Patents)


Company Filing History:

goldMedal17 out of 5,116 
 
Xilinx, Inc.
 patents

Years Active: 2000-2007

Loading Chart...
Areas of Expertise:
Programmable Logic Devices
Fault Coverage
Testing Methods
Signal Delays
Built-in Self Test
Pulse Generators
Edge Placement
Nanoscale Devices
Interconnect Testing
Application-Specific Methods
FPGA Testing
Signal Propagation
17 patents (USPTO):Explore Patents
1. 7219314 - Application-specific methods for testing molectronic or nanoscale devices (2007-05-15),
2. 7127697 - Methods of utilizing programmable logic devices having localized defects in application-specific products (2006-10-24),
3. 7007250 - Application-specific methods useful for testing look up tables in programmable logic devices (2006-02-28),
4. 6891395 - Application-specific testing methods for programmable logic devices (2005-05-10),
5. 6817006 - Application-specific testing methods for programmable logic devices (2004-11-09),
6. 6651238 - Providing fault coverage of interconnect in an FPGA (2003-11-18),
7. 6611477 - Built-in self test using pulse generators (2003-08-26),
8. 6594797 - Methods and circuits for precise edge placement of test signals (2003-07-15),
9. 6594610 - Fault emulation testing of programmable logic devices (2003-07-15),
10. 6539508 - Methods and circuits for testing programmable logic (2003-03-25),
11. 6466520 - Built-in AC self test using pulse generators (2002-10-15),
12. 6356514 - Built-in self test method for measuring clock to out delays (2002-03-12),
13. 6233205 - Built-in self test method for measuring clock to out delays (2001-05-15),
14. 6232845 - Circuit for measuring signal delays in synchronous memory elements (2001-05-15),
15. 6219305 - Method and system for measuring signal propagation delays using ring oscillators (2001-04-17),

Title: The Innovative Journey of Robert D Patrie

Introduction: Robert D Patrie, a talented inventor based in Scotts Valley, CA, has made significant contributions to the field of technology with his creative and groundbreaking ideas.

Latest Patents: Robert D Patrie holds several patents in various technological domains, showcasing his versatility and ingenuity in inventing new solutions to complex problems.

Career Highlights: With a career spanning over two decades, Robert D Patrie has established himself as a prominent figure in the tech industry, known for his innovative approach and problem-solving skills. His work has not only revolutionized existing technologies but has also paved the way for new advancements in the field.

Collaborations: Throughout his career, Robert D Patrie has collaborated with leading tech companies, research institutions, and universities to bring his inventions to life. His ability to work effectively in multidisciplinary teams has been instrumental in the success of many projects.

Conclusion: In conclusion, Robert D Patrie's passion for innovation and his dedication to pushing the boundaries of technology have solidified his reputation as a visionary inventor. His contributions have had a lasting impact on the tech industry and will continue to inspire future generations of inventors.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
Loading…