Company Filing History:
Years Active: 2013-2016
Title: Richard West: Innovator in Thread Scheduling and Cache Management
Introduction
Richard West is a notable inventor based in Easton, MA (US), recognized for his contributions to the field of computing, particularly in thread scheduling and cache management. With a total of 4 patents to his name, West has made significant strides in optimizing processor performance through innovative methods.
Latest Patents
One of Richard West's latest patents is titled "Thread scheduling based on predicted cache occupancies of co-running threads." This method intelligently schedules multiple threads on a processor with several cores and a shared last level cache (LLC). The process involves identifying scenarios with different combinations of threads and predicting their cache occupancies. By determining which scenario results in the least objectionable impacts on all threads, West's method enhances overall performance.
Another significant patent is "Online computation of cache occupancy and performance." This invention provides methods and systems for managing thread performance based on cache occupancy. It includes a computer-implemented method that assigns performance counters to threads to measure cache misses. The method calculates values that help estimate cache occupancy, allowing for better resource allocation in computing environments.
Career Highlights
Richard West is currently employed at VMware, Inc., where he continues to develop innovative solutions in the computing sector. His work focuses on enhancing the efficiency of thread management and cache utilization, which are critical for optimizing processor performance.
Collaborations
West collaborates with talented individuals such as Puneet Zaroo and Carl Alan Waldspurger, contributing to a dynamic work environment that fosters innovation and creativity.
Conclusion
Richard West's contributions to thread scheduling and cache management have made a significant impact in the field of computing. His innovative patents reflect a deep understanding of processor performance optimization, showcasing his role as a leading inventor in this domain.
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