San Jose, CA, United States of America

Richard John Fagerlund


Average Co-Inventor Count = 4.0

ph-index = 2

Forward Citations = 11(Granted Patents)


Location History:

  • San Jose, CA (US) (2009 - 2011)
  • Morgan Hill, CA (US) (2012)

Company Filing History:


Years Active: 2009-2012

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3 patents (USPTO):Explore Patents

Title: Richard John Fagerlund: Innovator in Address Recycling and Digital Clock Smoothing

Introduction

Richard John Fagerlund is a notable inventor based in San Jose, California. He holds three patents that showcase his expertise in the fields of address recycling and digital clock smoothing. His innovative contributions have made a significant impact in the technology sector.

Latest Patents

Fagerlund's latest patents include an Address Locked Loop (ALL) apparatus designed for address recycling. This apparatus features a block of memory with multiple buffers for storing incoming packets, an address stack for free addresses, and a control block for managing address requests. Another significant patent is his method for digital clock smoothing, which involves inputting an asynchronous data stream into a FIFO two-port memory block and utilizing a programmable look-up table to achieve a smoothed symbol rate.

Career Highlights

Throughout his career, Richard has worked with companies such as Wideband Semiconductors, Inc. and Wideband Semiconductor, Inc. His work has contributed to advancements in technology and has been recognized within the industry.

Collaborations

Fagerlund has collaborated with notable individuals, including David Bruce Isaksen and James P Flynn. These partnerships have further enhanced his innovative projects and contributions to the field.

Conclusion

Richard John Fagerlund is a distinguished inventor whose work in address recycling and digital clock smoothing has left a lasting mark on technology. His patents reflect his commitment to innovation and excellence in engineering.

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