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For the Inventor, By the Inventor

Calabogie, Canada

Richard C Foss

This inventor holds 50 USPTO granted patents and 1 published patent application, plus 1 CIPO patent, primarily in Memory Architecture. Top assignees: Mosaid Technologies Corporation, Mosaid, Inc., Other. Active years: 1990-2014.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Richard C Foss. Retrieved from https://idiyas.com/inventor/richard-c-foss

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank
USPTO Granted Patents = 50 

% Patents Active = 68.0


Average Co-Inventor Count = 1.6

ph-index = 15

Forward Citations = 852(Granted Patents)

Forward Citations (Not Self Cited) = 794(Dec 10, 2025)


Location History:

  • Calibogie Lake, CA (1992)
  • Kirkcaldy, GB (1993)
  • Kanata, CA (1993)
  • Scotland, CA (1998 - 2003)
  • Calabogie Lake, CA (1998 - 2006)
  • Kirkcaldy Fife, GB (1991 - 2009)
  • Calabogie, ON., CA (2009)
  • Scotland, GB (2003 - 2013)
  • Calabogie, CA (1990 - 2014)

Company Filing History:

goldMedal42 out of 690 
 
Mosaid Technologies Corporation
 patents
silverMedal6 out of 12 
 
Mosaid, Inc.
 patents
bronzeMedal2 out of 834,659 
Other
 patents

Years Active: 1990-2014

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Areas of Expertise:
Delay Locked Loop
Dynamic Random Access Memory
Error Correction
Embedded Memory
Wide Databus
Voltage Supply
Charge Pump
ASIC Process
Digital Memory Testing
Synchronous Design
50 patents (USPTO):Explore Patents
1. 8638638 - Delay locked loop implementation in a synchronous dynamic random access memory (2014-01-28),
2. 8441878 - Embedded memory databus architecture (2013-05-14),
3. 8369182 - Delay locked loop implementation in a synchronous dynamic random access memory (2013-02-05),
4. 8218386 - Embedded memory databus architecture (2012-07-10),
5. 7859930 - Embedded memory databus architecture (2010-12-28),
6. 7636880 - Error correction scheme for memory (2009-12-22),
7. 7609573 - Embedded memory databus architecture (2009-10-27),
8. 7599246 - Delay locked loop implementation in a synchronous dynamic random access memory (2009-10-06),
9. 7486580 - Wide databus architecture (2009-02-03),
10. RE40552 - Dynamic random access memory using imperfect isolating transistors (2008-10-27),
11. 7350137 - Method and circuit for error correction in CAM cells (2008-03-25),
12. 7266747 - Error correction scheme for memory (2007-09-04),
13. 7095666 - Wide databus architecture (2006-08-22),
14. 7010741 - Method and circuit for error correction in CAM cells (2006-03-07),
15. 6992950 - Delay locked loop implementation in a synchronous dynamic random access memory (2006-01-31),

Title: The Innovative Journey of Richard C Foss

Introduction: Richard C Foss, a distinguished inventor hailing from Calabogie, CA, has made significant contributions to the field of innovations with his groundbreaking ideas and inventions.

Latest Patents: Richard C Foss holds several patents in various industries, including technology, healthcare, and automotive sectors. His recent patents focus on enhancing user experience through cutting-edge technologies.

Career Highlights: With a career spanning over two decades, Richard C Foss has established himself as a visionary inventor with a keen eye for identifying gaps in the market and developing innovative solutions. His inventions have revolutionized the way we interact with technology on a daily basis.

Collaborations: Throughout his career, Richard C Foss has collaborated with leading companies, research institutions, and universities to bring his inventions to life. His ability to work across different sectors and disciplines has led to the successful implementation of his ideas in real-world applications.

Conclusion: In conclusion, Richard C Foss's passion for innovation and dedication to pushing the boundaries of what is possible have cemented his legacy as a pioneering inventor. His relentless pursuit of excellence continues to inspire the next generation of inventors to think outside the box and create a better future for all.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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