Richard Brunner

Title: Richard Brunner: Innovator in Instruction Cache Technology

Introduction

Richard Brunner is a notable inventor based in Gilbert, AZ (US). He has made significant contributions to the field of technology, particularly in the area of instruction cache and microcode ROM accessibility. With a total of 3 patents to his name, Brunner's work has had a substantial impact on the efficiency and functionality of computing systems.

Latest Patents

Brunner's latest patents include a method and apparatus for providing full accessibility to instruction cache and microcode ROM. This innovative approach involves writing a dummy tag and a dummy instruction into a cache tag array and an instruction array during a test mode. The process includes invoking an instruction fetch using a dummy address, accessing the instruction cache, and forcing a cache miss to occur. Additionally, the method allows for a read operation that forces an instruction cache hit, ensuring that data can be read from the cache while suppressing execution. This technique also extends to microcode ROM, enhancing the overall testing capabilities of on-chip systems.

Career Highlights

Brunner has built a successful career at Intel Corporation, where he has been able to apply his expertise in developing advanced technologies. His work has contributed to the company's reputation as a leader in the semiconductor industry.

Collaborations

Throughout his career, Brunner has collaborated with talented individuals such as James Earl White and Chandrashekhar S Patwardhan. These partnerships have fostered innovation and have led to the development of cutting-edge technologies in the field.

Conclusion

Richard Brunner's contributions to instruction cache technology and microcode ROM accessibility highlight his role as a significant inventor in the tech industry. His innovative patents and collaborations continue to influence advancements in computing systems.