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For the Inventor, By the Inventor

San Jose, CA, United States of America

Rajiv L Patel

This inventor holds 7 USPTO granted patents. Top assignee: Lsi Logic Corporation. Active years: 2002-2004.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Rajiv L Patel. Retrieved from https://idiyas.com/inventor/rajiv-l-patel

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 7

% Patents Active = 85.7

Average Co-Inventor Count = 2.3

ph-index = 4

Forward Citations = 93(Granted Patents)


Company Filing History:

goldMedal7 out of 3,715 
 
Lsi Logic Corporation
 patents

Years Active: 2002-2004

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7 patents (USPTO):Explore Patents
1. 6680243 - Shallow junction formation (2004-01-20),
2. 6656805 - METHOD OF REDUCING SILICON OXYNITRIDE GATE INSULATOR THICKNESS IN SOME TRANSISTORS OF A HYBRID INTEGRATED CIRCUIT TO OBTAIN INCREASED DIFFERENTIAL IN GATE INSULATOR THICKNESS WITH OTHER TRANSISTORS OF THE HYBRID CIRCUIT (2003-12-02),
3. 6586814 - Etch resistant shallow trench isolation in a semiconductor wafer (2003-07-01),
4. 6562729 - Silicon nitride and silicon dioxide gate insulator transistors and method of forming same in a hybrid integrated circuit (2003-05-13),
5. 6521549 - METHOD OF REDUCING SILICON OXYNITRIDE GATE INSULATOR THICKNESS IN SOME TRANSISTORS OF A HYBRID INTEGRATED CIRCUIT TO OBTAIN INCREASED DIFFERENTIAL IN GATE INSULATOR THICKNESS WITH OTHER TRANSISTORS OF THE HYBRID CIRCUIT (2003-02-18),
6. 6436845 - Silicon nitride and silicon dioxide gate insulator transistors and method of forming same in a hybrid integrated circuit (2002-08-20),
7. 6335295 - Flame-free wet oxidation (2002-01-01),

Title: Rajiv L Patel: Innovator in Semiconductor Technology

Introduction

Rajiv L Patel is a prominent inventor based in San Jose, CA (US). He has made significant contributions to the field of semiconductor technology, holding a total of 7 patents. His innovative work focuses on methods that enhance the performance and efficiency of electronic devices.

Latest Patents

Among his latest patents, Patel has developed a method for forming shallow junctions in a substrate. This method involves masking the substrate to selectively cover and expose portions, followed by the implantation of dopants at varying depths. The process includes annealing the substrate to create a noncontiguous buried insulating layer, which is crucial for the formation of shallow junctions. Another notable patent addresses the reduction of silicon oxynitride gate insulator thickness in hybrid integrated circuits. This innovation allows for the formation of thinner gate insulators, enhancing the performance of digital and analog transistors.

Career Highlights

Rajiv L Patel has built a successful career at LSI Logic Corporation, where he has been instrumental in advancing semiconductor technologies. His work has not only contributed to the company's growth but has also had a lasting impact on the industry as a whole.

Collaborations

Throughout his career, Patel has collaborated with notable colleagues, including Arvind Kamath and Ravindra Manohar Kapre. These partnerships have fostered a creative environment that has led to groundbreaking innovations in semiconductor technology.

Conclusion

Rajiv L Patel's contributions to the field of semiconductor technology are noteworthy and reflect his dedication to innovation. His patents and collaborative efforts continue to influence the industry, making him a significant figure in the realm of electronics.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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