Rajesh Naidu Penagalapati

Title: Rajesh Naidu Penagalapati: Inventor in Semiconductor Defect Classification.

Introduction

Rajesh Naidu Penagalapati is an inventor based in San Jose, California, and works at Applied Materials, Inc. His work includes an invention applying machine learning to classify defect patterns on substrates.

Latest Patents

Penagalapati is named on 1 patent, titled “Classification of Defect Patterns of Substrates.” The method obtains data about defect locations on a substrate and generates an image showing those locations. A trained machine-learning model analyzes the image and classifies the defect locations. The method then uses the model’s output to guide a corrective action.

Career Highlights

Penagalapati’s patent reflects work at the intersection of semiconductor manufacturing, image analysis, and machine learning. By classifying substrate defects and informing corrective actions, the approach is directed toward supporting manufacturing process improvement.

Collaborations

His listed coworkers include Chandrani Roy Chowdhury and Sanjiv Mittal. The available information identifies them as coworkers but does not specify their roles in the patent.

Conclusion

Rajesh Naidu Penagalapati’s patented method uses machine learning to classify substrate defect patterns and support corrective action in semiconductor manufacturing.