Sunnyvale, CA, United States of America

Rajat Arora


Average Co-Inventor Count = 6.0

ph-index = 1

Forward Citations = 11(Granted Patents)


Company Filing History:


Years Active: 2010

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1 patent (USPTO):Explore Patents

Title: Innovations by Rajat Arora in Low Power Design

Introduction

Rajat Arora is an accomplished inventor based in Sunnyvale, California. He has made significant contributions to the field of low power design through his innovative patent. His work focuses on enhancing the efficiency of circuit designs, which is crucial in today's technology-driven world.

Latest Patents

Rajat Arora holds a patent titled "Method and system for equivalence checking of a low power design." This patent discloses a method that includes receiving a register-transfer level (RTL) netlist representation of a circuit and a power specification file that describes the power requirements of the circuit. The method involves creating a low power gate netlist and a reference low power RTL netlist, followed by performing equivalence checking between these two netlists. Additionally, it includes annotating low power information into the reference low power RTL netlist and creating low power logic within it.

Career Highlights

Rajat Arora is currently employed at Cadence Design Systems, Inc., where he applies his expertise in low power design. His work at Cadence has positioned him as a key player in the development of innovative solutions for circuit design.

Collaborations

Rajat collaborates with talented professionals such as Manish Pandey and Chih-Chang Lin. Their teamwork fosters an environment of creativity and innovation, leading to advancements in low power design technologies.

Conclusion

Rajat Arora's contributions to low power design through his patent and work at Cadence Design Systems, Inc. highlight his role as a significant inventor in the field. His innovative methods are paving the way for more efficient circuit designs in the future.

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