Company Filing History:
Years Active: 2016
Title: Rajat Agrawal: Innovator in Error Correcting Code Technology
Introduction
Rajat Agrawal is a notable inventor based in Beaverton, Oregon. He has made significant contributions to the field of error correcting codes, particularly through his innovative patent. His work is instrumental in enhancing the reliability of memory devices.
Latest Patents
Rajat Agrawal holds a patent titled "Error correcting code scheme utilizing reserved space." This patent describes methods, techniques, systems, and apparatuses for utilizing reserved space for error correcting functionality. Specifically, it involves using a cache line, referred to as a 'reserved line,' within a plurality of cache lines to store error correcting code (ECC) data. This ECC data corresponds to other cache lines when a memory device has failed. His innovative approach addresses critical issues in memory reliability.
Career Highlights
Rajat Agrawal is currently employed at Intel Corporation, a leading technology company known for its advancements in semiconductor manufacturing and computing technologies. His role at Intel allows him to work on cutting-edge technologies that shape the future of computing.
Collaborations
Rajat collaborates with talented individuals such as Debaleena Das and Kai Cheng. Their combined expertise contributes to the development of innovative solutions in the tech industry.
Conclusion
Rajat Agrawal's contributions to error correcting code technology exemplify his commitment to innovation in the field. His patent and work at Intel Corporation highlight his role as a key player in advancing memory reliability.