The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 12, 2016

Filed:

Mar. 30, 2012
Applicants:

Rajat Agrawal, Beaverton, OR (US);

Debaleena Das, Los Gatos, CA (US);

Kai Cheng, Portland, OR (US);

Inventors:

Rajat Agrawal, Beaverton, OR (US);

Debaleena Das, Los Gatos, CA (US);

Kai Cheng, Portland, OR (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03M 13/00 (2006.01); H03M 13/05 (2006.01); G06F 11/10 (2006.01); G06F 12/08 (2016.01); G11C 29/04 (2006.01);
U.S. Cl.
CPC ...
H03M 13/05 (2013.01); G06F 11/1064 (2013.01); G06F 12/0895 (2013.01); G11C 2029/0411 (2013.01); Y02B 60/1225 (2013.01);
Abstract

Methods, techniques, systems and apparatuses for utilizing reserved space for error correcting functionality. A cache line ('reserved line') in a plurality of cache lines to store error correcting code (ECC) data is utilized for storing ECC data corresponding to other cache lines within the plurality of cache lines when a memory device has failed.


Find Patent Forward Citations

Loading…