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For the Inventor, By the Inventor

Sandy, UT, United States of America

Raied N Mazahreh

This inventor holds 22 USPTO granted patents and 1 EPO patent, primarily in Error Correction Coding. Top assignees: Xilinx, Inc., L-3 Communications Corporation. Active years: 2001-2019.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Raied N Mazahreh. Retrieved from https://idiyas.com/inventor/raied-n-mazahreh

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank
USPTO Granted Patents = 22

% Patents Active = 95.5

 

Average Co-Inventor Count = 2.9

ph-index = 8

Forward Citations = 184(Granted Patents)


Location History:

  • Salt Lake City, UT (US) (2001 - 2010)
  • Cottonwood Heights, UT (US) (2013 - 2014)
  • Sandy, UT (US) (2015 - 2019)

Company Filing History:

goldMedal19 out of 5,116 
 
Xilinx, Inc.
 patents
silverMedal3 out of 466 
 
L-3 Communications Corporation
 patents

Years Active: 2001-2019

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Areas of Expertise:
LDPC Codes
Error Correction
Forward Error Correction
MIMO Decoding
Viterbi Synchronization
Matrix Expansion
Parity Check Matrix
Systolic Array
Burst Code Signals
Interleaver Address
Pipelined Architecture
Turbo Product Code
22 patents (USPTO):Explore Patents
1. 10263644 - Hybrid architecture for LDPC channel coding in data center (2019-04-16),
2. 9667276 - Efficient low error-floor LDPC codes (2017-05-30),
3. 9287899 - Forward error correction (2016-03-15),
4. 9203440 - Matrix expansion (2015-12-01),
5. 9112529 - Method and system for forward error correction of interleaved-formated data (2015-08-18),
6. 9083383 - Parity check matrix (2015-07-14),
7. 9047241 - Minimum mean square error processing (2015-06-02),
8. 9047240 - Minimum mean square error processing (2015-06-02),
9. 9009577 - Circuitry and method for forward error correction (2015-04-14),
10. 8959418 - Forward error correction (2015-02-17),
11. 8875001 - Circuitry for parallel decoding of data blocks (2014-10-28),
12. 8667377 - Circuit and method for parallel decoding (2014-03-04),
13. 8620984 - Minimum mean square error processing (2013-12-31),
14. 8416841 - Multiple-input multiple-output (MIMO) decoding with subcarrier grouping (2013-04-09),
15. 8406334 - Overflow resistant, fixed precision, bit optimized systolic array for QR decomposition and MIMO decoding (2013-03-26),

Title: The Innovative Journey of Raied N Mazahreh

Introduction:

Raied N Mazahreh, a talented inventor hailing from Sandy, UT (US), has made significant contributions to the world of technology through his groundbreaking innovations.

Latest Patents:

Raied N Mazahreh's latest patents include cutting-edge solutions in the fields of artificial intelligence, renewable energy, and sustainable agriculture, showcasing his versatility and forward-thinking approach.

Career Highlights:

With a career spanning over two decades, Raied N Mazahreh has worked with top research institutions and leading tech companies, honing his skills and pushing the boundaries of what is possible in the realm of innovation. His dedication to creating solutions that make a positive impact on society has earned him recognition as a visionary in his field.

Collaborations:

Raied N Mazahreh has collaborated with renowned scientists, engineers, and inventors from around the globe, fostering a culture of creativity and excellence. His ability to work seamlessly in multidisciplinary teams has led to the development of groundbreaking technologies that have the potential to shape the future.

Conclusion:

In conclusion, Raied N Mazahreh's passion for innovation, coupled with his relentless drive to make the world a better place through technology, sets him apart as a true pioneer in the world of inventions. His journey continues to inspire aspiring inventors and researchers to push the boundaries of what is possible, leaving a lasting impact on the world.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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