San Diego, CA, United States of America

Raghuveer Raghavendra

USPTO Granted Patents = 5 

 

Average Co-Inventor Count = 6.7

ph-index = 2

Forward Citations = 9(Granted Patents)


Company Filing History:


Years Active: 2017-2019

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5 patents (USPTO):Explore Patents

Title: Innovations of Raghuveer Raghavendra

Introduction

Raghuveer Raghavendra is a notable inventor based in San Diego, CA. He has made significant contributions to the field of memory systems in processor-based technologies. With a total of 5 patents to his name, Raghavendra continues to push the boundaries of innovation.

Latest Patents

Raghavendra's latest patents include groundbreaking work on reducing bandwidth consumption when performing free memory list cache maintenance in compressed memory schemes of processor-based systems. This patent discloses a memory system that includes a compression circuit designed to cache free memory lists using multiple buffers. The system optimizes memory access operations by refilling and emptying buffers based on specific threshold values. Another significant patent focuses on reducing metadata size in compressed memory systems. This invention provides a compressed memory system that associates virtual addresses with abbreviated physical addresses, streamlining memory access operations.

Career Highlights

Raghavendra is currently employed at Qualcomm Incorporated, a leading company in telecommunications and semiconductor technology. His work at Qualcomm has allowed him to develop innovative solutions that enhance memory efficiency in modern computing systems.

Collaborations

Raghavendra has collaborated with talented coworkers, including Andres Alejandro Oportus Valenzuela and Richard Senior. These collaborations have contributed to the advancement of his research and the successful development of his patents.

Conclusion

Raghuveer Raghavendra is a prominent inventor whose work in memory systems has led to significant advancements in technology. His innovative patents reflect his commitment to improving efficiency in processor-based systems.

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