Reducing metadata size in compressed memory systems of processor-based systems

Abstract

Reducing metadata size in compressed memory systems of processor-based systems is disclosed. In one aspect, a compressed memory system provides 2compressed data regions, corresponding 2sets of free memory lists, and a metadata circuit. The metadata circuit associates virtual addresses with abbreviated physical addresses, which omit N upper bits of corresponding full physical addresses, of memory blocks of the 2compressed data regions. A compression circuit of the compressed memory system receives a memory access request including a virtual address, and selects one of the 2compressed data regions and one of the 2sets of free memory lists based on a modulus of the virtual address and 2. The compression circuit retrieves an abbreviated physical address corresponding to the virtual address from the metadata circuit, and performs a memory access operation on a memory block associated with the abbreviated physical address in the selected compressed data region.