Raghu Ravindran

Title: Raghu Ravindran: Semiconductor Test Innovation

Introduction

Raghu Ravindran is an inventor based in Bengaluru, India, whose patent work includes techniques for testing analog-to-digital converters in semiconductor chips. He is associated with STMicroelectronics International N.V. and has 2 patents.

Latest Patents

Ravindran’s latest patent, “Memoryless Sliding Window Histogram Based BIST,” describes a built-in self-test (BIST) component for evaluating the linearity of an analog-to-digital converter (ADC). The design uses hardware registers to implement a sliding histogram, reducing the memory space required on the chip.

The BIST analyzes a moving subset of detected digital codes. A controller calculates differential nonlinearity (DNL) and integral nonlinearity (INL) to check whether codes exceed specified thresholds. As the ADC detects new codes, higher-value codes enter the subset while lower-value codes leave it. A synchronizer and pointer coordinate the subset’s movement with the analog input ramp.

Career Highlights

Ravindran’s patent work addresses efficient on-chip testing, with an emphasis on assessing ADC linearity while conserving hardware resources. His association with STMicroelectronics International N.V. places this work within the semiconductor industry.

Collaborations

Ravi Shekhar and Ravindranath Ramalingaiah Munnan are identified as Ravindran’s coworkers. The available information does not specify their roles in the patent.

Conclusion

Raghu Ravindran’s patent on memoryless sliding-window histogram-based BIST presents a resource-conscious approach to testing ADC linearity and reflects his contributions to semiconductor innovation.