This inventor holds 1 USPTO granted patent. Top assignee: Carnegie Mellon University. Active years: 1991.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile
Company Filing History:
Years Active: 1991
Title: Pranab K Nag: Innovator in Static RAM Technology
Introduction
Pranab K Nag is a notable inventor based in Pittsburgh, PA (US). He has made significant contributions to the field of memory technology, particularly in the development of Static RAM (SRAM) memory cells. His innovative approach has led to advancements that enhance the efficiency and functionality of memory devices.
Latest Patents
Pranab K Nag holds a patent for a Static RAM memory cell using N-channel MOS transistors. This invention utilizes a floating gate NMOS enhancement mode transistor, which effectively reduces power consumption, size, and circuit complexity of the memory cell. The design allows the gate of the load transistor to float without a galvanic connection to the memory cell circuit. A bias voltage is induced on the gate of the load transistor through capacitances with the source, drain, and bulk semiconductor, maintaining conductance below the conduction threshold. The gate bias is established by tailoring the gate capacitances and removing charge using UV light as necessary. He has 1 patent to his name.
Career Highlights
Pranab K Nag is affiliated with Carnegie Mellon University, where he continues to contribute to research and innovation in the field of electronics and memory technology. His work has been instrumental in advancing the understanding and application of SRAM technology.
Collaborations
One of his notable collaborators is Wojciech P Maly, with whom he has worked on various projects related to memory technology and semiconductor devices.
Conclusion
Pranab K Nag's contributions to the field of Static RAM technology exemplify his innovative spirit and dedication to advancing electronic memory solutions. His work continues to influence the development of efficient memory systems in modern technology.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile
