Singapore, Singapore

Poh Ling Fu

This inventor holds 2 USPTO granted patents. Top assignees: Japan Display Inc., Toshiba Matsushita Display Technology Co., Ltd.. Active years: 2011-2014.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Poh Ling Fu. Retrieved from https://idiyas.com/inventor/poh-ling-fu

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank

% Patents Active = 100.0

Average Co-Inventor Count = 6.0

ph-index = 1


Company Filing History:


Years Active: 2011-2014

Loading Chart...
2 patents (USPTO):Explore Patents

Title: Poh Ling Fu: Semiconductor and Laser-Annealing Patents.

Introduction

Poh Ling Fu is an inventor associated with Singapore. Her patent work includes semiconductor devices and laser-annealing methods. The supplied information lists 2 patents.

Latest Patents

Fu’s listed patents focus on laser annealing a nitrogen-doped layer formed on a semiconductor layer. The described method irradiates areas of the layer with a laser in a low-oxygen environment, with part of the second area overlapping the first.

The titles provided are “Semiconductor Device Having a Laser Annealed Semiconductor Layer” and “Method of Laser Annealing Semiconductor Layer and Semiconductor Devices Produced Thereby.” Both descriptions concern the same laser-annealing process and its application to semiconductor devices.

Career Highlights

The supplied career information associates Fu with Japan Display Inc. and Toshiba Matsushita Display Technology Co., Ltd. Her listed patent work reflects a focus on semiconductor processing and device technology.

Collaborations

The supplied information names Kian Kiat Lim and Atsushi Nakamura as Fu’s coworkers.

Conclusion

Poh Ling Fu’s listed inventions address laser annealing in semiconductor manufacturing, and her career information connects her with display technology companies and fellow inventors.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
Loading…