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Po-Yung Chang

USPTO Granted Patents = 23 (Patent Applications = 1)

Average Co-Inventor Count = 3.1

ph-index = 6

Forward Citations = 137(Granted Patents)

Company Filing History:

Years Active: 2005-2016

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23 patents (USPTO):Sort by Forward CitationsExplore Patents

1. 9383995 - Load ordering in a weakly-ordered processor (2016-07-05),

2. 8892841 - Store handling in a processor (2014-11-18),

3. 8316188 - Data prefetch unit utilizing duplicate cache tags (2012-11-20),

4. 8285937 - Fused store exclusive/memory barrier operation (2012-10-09),

5. 8255670 - Replay reduction for power saving (2012-08-28),

6. 8239638 - Store handling in a processor (2012-08-07),

7. 8219787 - Early release of resources by proceeding to retire store operations from exception reporting stage but keeping in load/store queue (2012-07-10),

8. 8171240 - Misalignment predictor (2012-05-01),

9. 8117404 - Misalignment predictor (2012-02-14),

10. 7996646 - Efficient encoding for detecting load dependency on store with misalignment (2011-08-09),

11. 7996624 - Prefetch unit (2011-08-09),

12. 7984274 - Partial load/store forward prediction (2011-07-19),

13. 7962730 - Replaying memory operation assigned a load/store buffer entry occupied by store operation processed beyond exception reporting stage and retired from scheduler (2011-06-14),

14. 7779208 - Prefetch unit (2010-08-17),

15. 7721066 - Efficient encoding for detecting load dependency on store with misalignment (2010-05-18),

Title: The Innovative Contributions of Po-Yung Chang

Introduction: Po-Yung Chang, a distinguished inventor based in Saratoga, CA, has made significant strides in the field of computer architecture with a remarkable portfolio of 23 patents. His work primarily focuses on advancing the efficiency and performance of processors, which is critical in today’s technology-driven world.

Latest Patents: Among his latest innovations, the patent titled "Load ordering in a weakly-ordered processor" introduces techniques for managing load instructions within a weakly-ordered memory model. It describes a processor featuring a cache with multiple lines and a store queue that monitors the status of store instructions. Notably, the processor employs an indicator in the status information to sequence load instructions effectively, thereby maintaining the integrity of load-load ordering. Another recent patent, "Store handling in a processor," details a system where processors write ECC granular stores into the data cache while merging non-ECC granular stores with cache data in a memory request buffer. This patent also innovatively allows a processor to speculatively issue stores following a load, enhancing overall processing efficiency.

Career Highlights: Throughout his career, Po-Yung Chang has been associated with prominent technology firms that have propelled his contributions to the forefront. He has worked at Apple Inc. and P.A. Semi, Inc., both renowned for their pioneering work in semiconductor technology and innovative product development. His experiences in these companies have played a pivotal role in shaping his inventive path.

Collaborations: Collaboration is crucial in the innovative process, and Po-Yung Chang has partnered with notable professionals in the field, including Sudarshan Kadambi and Tse-Yu Yeh. Their collective expertise has undoubtedly contributed to the successful development of groundbreaking technologies and patents.

Conclusion: Po-Yung Chang exemplifies the innovative spirit with his extensive patent portfolio and remarkable collaborations. His contributions to processor technology stand as a testament to his dedication and influence in the field. As technology continues to evolve, the impact of his inventions will be felt for years to come.

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