Tainan, Taiwan

Po-Tsung Hsieh

This inventor holds 1 USPTO granted patent and 3 published patent applications. Top assignee: National Cheng-Kung University. Active years: 2020.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Po-Tsung Hsieh. Retrieved from https://idiyas.com/inventor/po-tsung-hsieh-exkplbbe

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank
USPTO Granted Patents = 1 

% Patents Active = 100.0

Average Co-Inventor Count = 6.0

ph-index = 1

Forward Citations = 2(Granted Patents)


Company Filing History:


Years Active: 2020

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1 patent (USPTO):Explore Patents

Title: Po-Tsung Hsieh: Innovator in Chip Packaging Technology

Introduction

Po-Tsung Hsieh is a notable inventor based in Tainan, Taiwan. He has made significant contributions to the field of chip packaging technology. His innovative approach has led to the development of a unique device that enhances the efficiency of chip bonding processes.

Latest Patents

Hsieh holds a patent for a "Chip packaging device and alignment bonding method thereof." This invention includes a main body unit, packaging unit, and an aligning unit. The main body unit consists of a mounting base, holder, and a rotational platform. The packaging unit features upper and lower bonding elements, upper and lower chips, and a mask. The aligning unit incorporates an aligning detector and a first focusing detector. This technology allows for precise alignment and bonding of chips, improving the overall packaging process.

Career Highlights

Po-Tsung Hsieh is affiliated with National Cheng-Kung University, where he continues to advance research in chip packaging technologies. His work has garnered attention for its practical applications in the semiconductor industry. Hsieh's dedication to innovation is evident in his patent, which reflects his expertise and commitment to enhancing technology.

Collaborations

Hsieh has collaborated with colleagues such as Ya-Wen Chuang and Shih-Wen Tseng. These partnerships have contributed to the development of cutting-edge technologies in the field of chip packaging.

Conclusion

Po-Tsung Hsieh is a prominent figure in the realm of chip packaging innovation. His patented technology represents a significant advancement in the industry, showcasing his expertise and dedication to improving semiconductor processes.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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