Tainan, Taiwan

Po-kai Hsu

This inventor holds 1 USPTO granted patent and 25 published patent applications and 9 EPO patents. Top assignee: United Microelectronics Corp.. Active years: 2026.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Po-kai Hsu. Retrieved from https://idiyas.com/inventor/po-kai-hsu-beabe6ms

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 1 

 

Average Co-Inventor Count = 1.0

ph-index = 1


Company Filing History:


Years Active: 2026

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1 patent (USPTO):Explore Patents

Title: Po-kai Hsu: Innovator in Semiconductor Technology

Introduction: Po-kai Hsu is an accomplished inventor based in Tainan, Taiwan. He is currently employed at United Microelectronics Corporation, where he contributes to advancements in semiconductor technology. Despite having no granted patents to his name, Hsu is actively involved in innovative research and development.

Latest Patent Applications: Po-kai Hsu has submitted several notable patent applications. One of his latest applications is titled "Memory Array." This invention describes a memory array that includes at least one strap region, at least two sub-arrays, a plurality of staggered, dummy magnetic storage elements, and a plurality of bit line structures. The strap region consists of multiple source line straps and word line straps, while the two sub-arrays contain staggered, active magnetic storage elements. The staggered, dummy magnetic storage elements are strategically placed within the strap region, and the bit line structures are positioned in the two sub-arrays, directly connected to the active magnetic storage elements.

Another significant application is for a "Semiconductor Device and Method for Fabricating the Same." This invention outlines a semiconductor device that features a magnetic tunneling junction (MTJ) on a substrate, a cap layer in direct contact with the MTJ, and a first inter-metal dielectric (IMD) layer surrounding the MTJ. The device also includes a top electrode on the MTJ, a metal interconnection beneath the MTJ, and a second IMD layer encasing the metal interconnection. The cap layer is designed as a single layer structure made of dielectric material, ensuring direct contact with the first IMD layer.

Conclusion: Po-kai Hsu is a dedicated inventor making strides in the field of semiconductor technology through his innovative patent applications. His work at United Microelectronics Corporation showcases his commitment to advancing the industry, and his contributions are expected to have a lasting impact.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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