New Taipei City, Taiwan

Pinhsueh Lai

This inventor holds 1 USPTO granted patent. Top assignee: Micron Technology Incorporated. Active years: 2026.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Pinhsueh Lai. Retrieved from https://idiyas.com/inventor/pinhsueh-lai-72io7wfk

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile


Average Co-Inventor Count = 1.0


Company Filing History:


Years Active: 2026

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1 patent (USPTO):Explore Patents

Title: Pinhsueh Lai: NAND Memory Page-Order Error Detection

Introduction

Pinhsueh Lai is an inventor associated with Micron Technology Incorporated in New Taipei City, Taiwan. His patent work addresses page-order error detection in NAND memory devices.

Latest Patents

The provided information lists one patent for Lai: “Page program not in order error detection.” The invention adds current written page (CWP) and current written block (CWB) variables for each plane in a NAND memory device. When these variables are set, the device performs an erase page check on the indicated page and the preceding page. The indicated page should be empty, while the preceding page should already be programmed. The device also compares the page and block specified in a write command with the CWP and CWB values to verify that the host is writing to the correct location. These checks help detect out-of-order writes and reduce the risk of overwriting data or skipping a page.

Career Highlights

Lai’s listed patent focuses on improving the reliability of NAND memory operations by checking page status and write-command order. The provided information identifies Micron Technology Incorporated as his company.

Collaborations

Wai Leong Chin is identified as Lai’s coworker. The information provided does not specify a direct collaboration between them on this patent.

Conclusion

Pinhsueh Lai’s listed invention contributes to NAND memory error detection by verifying page status and write order before data is written.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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