Chiayi, Taiwan

Ping-wei Lin

This inventor holds 2 USPTO granted patents. Top assignee: Mosel Vitelic Corporation. Active years: 2001.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Ping-wei Lin. Retrieved from https://idiyas.com/inventor/ping-wei-lin-3yvb6zzf

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile


% Patents Active = 100.0

Average Co-Inventor Count = 4.0

ph-index = 1

Forward Citations = 3(Granted Patents)


Company Filing History:


Years Active: 2001

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2 patents (USPTO):Explore Patents

Title: The Innovative Contributions of Ping-wei Lin

Introduction

Ping-wei Lin is a notable inventor based in Chia-Yi, Taiwan. He has made significant contributions to the field of semiconductor technology, holding a total of 2 patents. His work focuses on methods that enhance the performance and reliability of semiconductor devices.

Latest Patents

Ping-wei Lin's latest patents include a "Method for improving trench isolation" and a "Method for planarizing a polycrystalline silicon layer deposited on a trench." The first patent discloses a technique for improving trench isolation by etching a trench into the substrate using a photo mask. This method involves depositing a bottom oxide layer, a sidewall oxide layer, and a polycrystalline silicon layer into the trench, followed by a series of etching and oxidation steps to create a uniform plug edge that prevents stress problems. The second patent outlines a method for planarizing a polycrystalline silicon layer on a semiconductor substrate. This process includes depositing a polycrystalline silicon layer, forming an oxide layer, and partially oxidizing the silicon layer to achieve a substantially planar surface.

Career Highlights

Ping-wei Lin is currently employed at Mosel Vitelic Corporation, where he continues to innovate in semiconductor technology. His expertise in trench isolation and planarization techniques has contributed to advancements in the manufacturing processes of semiconductor devices.

Collaborations

Throughout his career, Ping-wei Lin has collaborated with talented individuals such as Jui-ping Li and Chien-hung Chen. These collaborations have fostered a creative environment that encourages the development of innovative solutions in the semiconductor industry.

Conclusion

Ping-wei Lin's contributions to semiconductor technology through his patents and collaborations highlight his role as a significant inventor in the field. His innovative methods continue to influence the industry and improve the performance of semiconductor devices.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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