Hsinchu, Taiwan

Ping-Hsun Lin

This inventor holds 1 USPTO granted patent. Top assignee: Taiwan Semiconductor Manufacturing Co., Ltd.. Active years: 2026.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Ping-Hsun Lin. Retrieved from https://idiyas.com/inventor/ping-hsun-lin-8a6qnpdk

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile


Average Co-Inventor Count = 1.0


Company Filing History:


Years Active: 2026

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1 patent (USPTO):Explore Patents

Title: Innovations by Ping-Hsun Lin

Introduction

Ping-Hsun Lin is a notable inventor based in Hsinchu, Taiwan. He has made significant contributions to the field of semiconductor technology, particularly in the development of extreme ultraviolet (EUV) masks. His work is essential for advancing lithography techniques used in the manufacturing of integrated circuits.

Latest Patents

One of Ping-Hsun Lin's key patents is for an extreme ultraviolet mask with a capping layer. This innovative EUV mask includes a substrate and a reflective multilayer stack on the substrate. Additionally, it features a single layer or multi-layer capping feature on the reflective multilayer stack. The capping feature comprises a capping layer or layers made from a material with an amorphous structure. Notably, the capping layers may contain elements with a first solid carbon solubility of less than about 3. In some embodiments, the elements of the respective capping layers exhibit different solid carbon solubility properties.

Career Highlights

Ping-Hsun Lin is associated with Taiwan Semiconductor Manufacturing Co., Ltd., a leading company in the semiconductor industry. His work at TSMC has positioned him at the forefront of technological advancements in chip manufacturing.

Conclusion

Ping-Hsun Lin's contributions to the field of semiconductor technology, particularly through his innovative patent for an extreme ultraviolet mask, highlight his role as a significant inventor. His work continues to influence the future of integrated circuit manufacturing.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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