This inventor holds 2 USPTO granted patents. Top assignee: Globalfoundries U.S. Inc.. Active years: 2022.
Company Filing History:
Years Active: 2022
Title: Peter P Hang - Innovator in Integrated Circuit Technology
Introduction
Peter P Hang is a notable inventor based in Santa Clara, CA (US). He has made significant contributions to the field of integrated circuit technology, holding a total of 2 patents. His work focuses on advancements that enhance the functionality and efficiency of electronic devices.
Latest Patents
Peter's latest patents include an integrated circuit with a P-N-P junction and a vertically aligned field effect transistor. This invention provides an integrated circuit (IC) structure that includes a p-type substrate, a p-well region within the p-type substrate, and an n-type barrier region that physically isolates the p-type substrate from the p-well region. Additionally, he has developed a bandgap reference circuit that features vertically stacked active SOI devices, which enhances the performance of electronic circuits.
Career Highlights
Peter P Hang is currently employed at Globalfoundries U.S. Inc., where he continues to innovate in the field of semiconductor technology. His expertise in integrated circuits has positioned him as a valuable asset in the industry.
Collaborations
Peter has collaborated with notable coworkers, including Don Raymond Blackwell and Van Ton-That, contributing to various projects that push the boundaries of technology.
Conclusion
Peter P Hang's contributions to integrated circuit technology exemplify his dedication to innovation. His patents reflect a commitment to advancing electronic device performance, making him a significant figure in the field.