Union City, CA, United States of America

Peter K Chan

This inventor holds 1 USPTO granted patent. Top assignee: International Business Machines Corporation. Active years: 2007.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Peter K Chan. Retrieved from https://idiyas.com/inventor/peter-k-chan-6u57iirl

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile


Average Co-Inventor Count = 5.0

ph-index = 1

Forward Citations = 5(Granted Patents)


Company Filing History:


Years Active: 2007

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1 patent (USPTO):Explore Patents

Title: The Innovations of Peter K Chan

Introduction

Peter K Chan is a notable inventor based in Union City, CA (US). He has made significant contributions to the field of integrated circuit design. His innovative approach has led to the development of a unique patent that addresses critical areas in integrated circuit layouts.

Latest Patents

Peter K Chan holds a patent titled "Integrated circuit layout critical area determination using Voronoi diagrams and shape biasing." This patent describes a method, system, and program product for determining a critical area in a region of an integrated circuit layout. The method involves generating a biased Voronoi diagram based on the layout geometry of the region and incorporating a shape bias. It also includes steps for determining the critical area for the region using the biased Voronoi diagram. He has 1 patent to his name.

Career Highlights

Peter K Chan is currently employed at International Business Machines Corporation, commonly known as IBM. His work at IBM has allowed him to explore and implement innovative solutions in the realm of integrated circuits. His expertise in this area has made him a valuable asset to the company.

Collaborations

Some of his notable coworkers include Robert J Allen and Evanthia Papadopoulou. Their collaboration has likely contributed to the advancement of technology within their projects.

Conclusion

Peter K Chan's contributions to integrated circuit design through his innovative patent demonstrate his expertise and commitment to advancing technology. His work continues to influence the field and inspire future innovations.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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