San Jose, CA, United States of America

Peter J Hoppet

This inventor holds 1 USPTO granted patent. Top assignee: National Semiconductor Corporation. Active years: 2006.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Peter J Hoppet. Retrieved from https://idiyas.com/inventor/peter-j-hoppet

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank

% Patents Active = 100.0

Average Co-Inventor Count = 4.0

ph-index = 1

Forward Citations = 12(Granted Patents)


Company Filing History:


Years Active: 2006

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1 patent (USPTO):Explore Patents

Title: The Innovations of Peter J Hoppet

Introduction

Peter J Hoppet is a notable inventor based in San Jose, CA. He has made significant contributions to the field of semiconductor technology. His work primarily focuses on the development of innovative devices that enhance electronic performance.

Latest Patents

One of Hoppet's key inventions is the avalanche diode with breakdown voltage controlled by gate length. This patent describes a method in which different breakdown voltages are achieved by utilizing a polygate and forming a highly doped p-n junction beneath the polygate. By adjusting the gate length and optionally the bias voltage of the gate, Hoppet's design offers improved control over the diode's performance.

Career Highlights

Hoppet is currently employed at National Semiconductor Corporation, where he continues to push the boundaries of semiconductor innovation. His work has been instrumental in advancing the capabilities of electronic devices.

Collaborations

Throughout his career, Hoppet has collaborated with talented individuals such as Vladislav Vashchenko and Marcel A Ter Beek. These partnerships have fostered a creative environment that encourages the development of groundbreaking technologies.

Conclusion

Peter J Hoppet's contributions to the field of semiconductor technology exemplify the spirit of innovation. His work on the avalanche diode and collaborations with esteemed colleagues highlight his commitment to advancing electronic performance.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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