Pei-Pei Chen

Title: Pei-Pei Chen: Innovator in Layout Violation Fixing

Introduction

Pei-Pei Chen is a notable inventor based in Nanjing, China. She has made significant contributions to the field of semiconductor manufacturing, particularly in methods for fixing layout violations. Her innovative approach has garnered attention in the industry.

Latest Patents

Pei-Pei Chen holds a patent titled "Method and system for fixing violation of layout." This patent describes a method that includes identifying a layer of a first layout based on a first violation generated on that layer. The process involves generating a metal density value associated with the layer. If the metal density value is larger than or equal to a preset value, the first violation is classified into a category corresponding to routing congestions of the first layout. Subsequently, a first operation from a set of pre-stored operations is assigned to the violation, which is then performed to generate a second layout. This innovative method addresses critical issues in layout design and optimization.

Career Highlights

Pei-Pei Chen has worked with prominent companies in the semiconductor industry, including Taiwan Semiconductor Manufacturing Company Ltd. and TSMC Nanjing Company, Limited. Her experience in these organizations has allowed her to develop and refine her expertise in layout design and violation management.

Collaborations

Throughout her career, Pei-Pei Chen has collaborated with talented individuals such as Yi-Lin Chuang and Song Liu. These collaborations have contributed to her success and the advancement of her innovative ideas.

Conclusion

Pei-Pei Chen is a remarkable inventor whose work in fixing layout violations has made a significant impact in the semiconductor industry. Her patent and career achievements reflect her dedication to innovation and excellence in her field.