Uttar Pradesh, India

Pawan Fangaria


Average Co-Inventor Count = 3.2

ph-index = 4

Forward Citations = 43(Granted Patents)


Location History:

  • Noida, IN (2011 - 2012)
  • Uttar Pradesh, IN (2012 - 2015)

Company Filing History:


Years Active: 2011-2015

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6 patents (USPTO):Explore Patents

Title: Pawan Fangaria: Innovator in Circuit Design Technologies

Introduction

Pawan Fangaria is a notable inventor based in Uttar Pradesh, India. He has made significant contributions to the field of integrated circuit design, holding a total of 6 patents. His work focuses on enhancing the efficiency and effectiveness of circuit design processes.

Latest Patents

Among his latest patents is a groundbreaking invention titled "Systems and methods for lithography-aware floorplanning." This invention is directed towards designing integrated circuits and provides systems and methods for lithography-aware floorplanning. According to one embodiment of the invention, a method for circuit floorplanning is provided. The method comprises generating a floorplan through a floorplanner, performing a lithography-analysis within the floorplanner on at least a portion of the floorplan, and generating one or more violations that result from the lithography-analysis. In some embodiments, in addition to viewing a floorplan, the method further comprises modifying the floorplan. Furthermore, some embodiments provide a method that further comprises fixing the violations that result from the lithography analysis.

Another significant patent is the "System and method for process rules editors." According to various embodiments of this invention, a system and method for editing process rules for circuit design through a graphical editor is provided. In some embodiments, the graphical editor is a circuit design tool that provides the user of the tool, such as a circuit designer or process engineer, the ability to visualize, modify, create, or remove process rules through a graphical user interface (GUI). These process rules, also known as constraints or circuit design constraints, relate to the layout of circuits and are grouped into constraint groups that can be associated with specific circuit design objects.

Career Highlights

Pawan Fangaria is currently associated with Cadence Design Systems, Inc., a leading company in electronic design automation. His work at Cadence has allowed him to push the boundaries of circuit design technology and contribute to innovative solutions in the industry.

Collaborations

Pawan has collaborated with several talented individuals in his field, including Hitesh Marwah and Chayan Majumder. These collaborations have fostered a creative environment that encourages innovation and the development of cutting-edge technologies.

Conclusion

Pawan Fangaria's contributions to circuit design and his innovative patents highlight his role as a significant inventor in the technology sector. His work continues to influence the future

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