Paul P Soong

Title: Paul P. Soong: Innovator in Delay Fault Testing

Introduction

Paul P. Soong is a notable inventor based in Nepean, Canada. He has made significant contributions to the field of interconnect delay testing, particularly through his innovative patent. His work has implications for both circuit board and ASIC designs, showcasing his expertise in the area of electronic testing.

Latest Patents

Paul P. Soong holds a patent for "Delay fault testing with IEEE 1149.1." This invention utilizes the IEEE 1149.1 standard test access port (TAP) controller for interconnect delay testing. Notably, it does not require any modification of standard boundary cells. By employing standard boundary scan cells, his method ensures that interconnect delay tests do not adversely affect ASIC designs. This innovation allows board and system designers to implement new interconnect AC tests for any signals at any time without needing to modify ASICs. Furthermore, since the method does not impact the operations of the standard TAP controller, it can leverage existing test software for interconnect DC tests to conduct the proposed delay test. Additionally, this method can be integrated as part of in-system interconnect tests.

Career Highlights

Paul P. Soong is associated with Nortel Networks Corporation, where he has contributed to advancements in electronic testing methodologies. His work has been instrumental in enhancing the reliability and efficiency of interconnect testing processes.

Collaborations

One of his notable collaborators is Yuejian Wu, with whom he has worked on various projects related to electronic testing.

Conclusion

Paul P. Soong's contributions to delay fault testing have paved the way for more efficient and reliable testing methods in electronic design. His innovative approach continues to influence the field significantly.