Parth Amin

This inventor holds 23 USPTO granted patents and 5 published patent applications, primarily in Non-Volatile Memory. Top assignees: Sandisk Technologies Inc., Western Digital Technologies, Inc.. Active years: 2020-2026.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Parth Amin. Retrieved from https://idiyas.com/inventor/parth-amin-ryacel02

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 23 (Patent Applications = 5)

% Patents Active = 87.0

Average Co-Inventor Count = 2.9

ph-index = 1

Forward Citations = 4(Granted Patents)

Location History:

Fremont, CA (US) (2020 - 2023)
Livermore, CA (US) (2024)

Company Filing History:

21 out of 4,943

Sandisk Technologies Inc.

patents

2 out of 5,427

Western Digital Technologies, Inc.

patents

Years Active: 2020-2026

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Areas of Expertise:

Memory Device

Defect Detection

Performance Optimization

Dynamic Programming

Ramp Rate Adjustment

Block Protection

Voltage Distribution

Erase Fail Detection

Threshold Voltage

Current Consumption

Error Detection

NAND Programming

23 patents (USPTO):Sort by Forward CitationsExplore Patents

1. 12718897 - Sub-block protection for memory devices (2026-08-25),

2. 12718886 - Word line bias during stripe erase in a memory device (2026-08-25),

3. 12706172 - Faster method to prevent hybrid single level cell defects in system (2026-08-11),

4. 12681661 - Non-volatile memory with operation adjustment based on open block ratio and cycling (2026-07-14),

5. 12658261 - Dynamic word line ramp up kick for memory devices (2026-06-16),

6. 12580029 - Neighbor plane disturb (NPD) detection for memory devices (2026-03-17),

7. 12542183 - Memory apparatus and method of operation using dynamic max program loop (2026-02-03),

8. 12494255 - Real time ramp rate adjustment for better performance and current consumption tradeoff (2025-12-09),

9. 12482532 - Non-volatile memory with adjustable ramp rate (2025-11-25),

10. 12469567 - Open block detection using current consumption peak during fourth time period of read operation and method of lowering current consumption for non-volatile memory apparatus (2025-11-11),

11. 12462877 - Program pulse duration increase for NAND program failure (2025-11-04),

12. 12437831 - Non-volatile memory with slow voltage ramp compensation (2025-10-07),

13. 12424295 - Evolving bad block detection in non-volatile memory (2025-09-23),

14. 12380960 - Non-volatile memory with faster post-erase defect testing (2025-08-05),

15. 12353275 - Optimized erratic program detection process (2025-07-08),

Title: Top Inventor in Fremont, California

Introduction: Hongyuan Zhang is a prominent inventor known for his significant contributions to various fields.

Latest Patents: His recent patents showcase innovative solutions and advancements in technology.

Career Highlights: Throughout his career, Zhang has achieved numerous accolades and recognition for his work.

Collaborations: He has collaborated with various organizations and institutions to further his research and development efforts.

Conclusion: Hongyuan Zhang continues to be a leading figure in innovation, inspiring future generations of inventors.

Profile summary based on public USPTO records.

Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]

5 patents pending: