This inventor holds 1 USPTO granted patent. Top assignee: Murata Manufacturing Co., Ltd.. Active years: 2026.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile
Company Filing History:
Years Active: 2026
Title: Innovations by Panglijen Candra in Semiconductor Technology
Introduction
Panglijen Candra is a notable inventor based in San Diego, California. He has made significant contributions to the field of semiconductor technology, particularly in the development of advanced FET structures. His innovative work has led to the creation of a patent that addresses critical challenges in integrated circuit fabrication.
Latest Patents
Candra holds a patent for "FET fin and vertical nanosheet formation using porous semiconductors." This patent outlines structures and methods for fabricating integrated circuits that utilize fins and vertical nanosheets made from a porous semiconductor known as π-Semi. The patent details a process that includes patterning an integrated circuit die, converting regions of crystalline semiconductor material into π-Semi, and etching to define fins or nanosheets. This innovative approach enhances the performance and efficiency of FinFETs and 'gate-all-around' FETs.
Career Highlights
Panglijen Candra is currently employed at Murata Manufacturing Co., Ltd., where he continues to push the boundaries of semiconductor technology. His work has been instrumental in advancing the capabilities of integrated circuits, making them more efficient and effective for various applications.
Collaborations
Candra collaborates with Kouassi Sebastien Kouassi, contributing to the development of cutting-edge technologies in the semiconductor industry. Their partnership exemplifies the importance of teamwork in driving innovation.
Conclusion
Panglijen Candra's contributions to semiconductor technology through his patent and work at Murata Manufacturing Co., Ltd. highlight his role as a key innovator in the field. His advancements in FET structures are paving the way for future developments in integrated circuits.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile