McLean, VA, United States of America

Padmaja Susarla


Average Co-Inventor Count = 3.8

ph-index = 1

Forward Citations = 2(Granted Patents)


Company Filing History:


Years Active: 2020-2023

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3 patents (USPTO):Explore Patents

Title: The Innovative Contributions of Padmaja Susarla

Introduction

Padmaja Susarla is a distinguished inventor based in McLean, VA (US). She has made significant contributions to the field of circuit design, holding a total of 3 patents. Her work focuses on enhancing the efficiency and accuracy of circuit layout verification and parasitic extraction.

Latest Patents

One of her latest patents is titled "Automatic identification of hierarchical cells based on selected properties for layout verification." This invention analyzes circuit designs by identifying the electrical properties of circuit blocks. It classifies instances of each circuit block into groups based on these properties and performs rule checking on these groups to ensure design integrity.

Another notable patent is "Automatic moving of probe locations for parasitic extraction." This patent identifies probe location candidates from geometric elements on a probe layer. It selects new probe locations based on predetermined criteria, allowing for accurate extraction of parasitic resistance values in circuit designs.

Career Highlights

Padmaja has worked with prominent companies in the industry, including Mentor Graphics Corporation and Siemens Industry Software GmbH. Her experience in these organizations has allowed her to develop innovative solutions that address complex challenges in circuit design.

Collaborations

Throughout her career, Padmaja has collaborated with talented professionals, including Sridhar Srinivasan and Patrick D. Gibson. These collaborations have contributed to her success and the advancement of her inventions.

Conclusion

Padmaja Susarla's contributions to circuit design through her patents demonstrate her innovative spirit and technical expertise. Her work continues to influence the field and inspire future advancements in technology.

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