Noriko Yabumoto

Title: Noriko Yabumoto: Innovator in Logic Equivalence Verification

Introduction

Noriko Yabumoto is a prominent inventor based in Kawasaki, Japan. She has made significant contributions to the field of logic equivalence verification, showcasing her expertise through her innovative patent.

Latest Patents

Yabumoto holds a patent for a "Method and apparatus for logic equivalence verification, and computer product." This verification apparatus is designed to determine whether a reference circuit and an implemented circuit are logically equivalent. The apparatus efficiently deletes all buffers and an even number of inverters between flip-flops. Furthermore, it merges logically equivalent flip-flops, enhancing the verification process. The apparatus compares the names of the flip-flops and pairs them accordingly. By defining logic cones from the input pins of each paired flip-flop, it performs a thorough comparison and verification between the reference and implemented circuits. She has 1 patent to her name.

Career Highlights

Yabumoto is currently employed at Fujitsu Semiconductor Limited, where she continues to develop her expertise in circuit verification technologies. Her work has been instrumental in advancing the efficiency and accuracy of logic verification processes.

Collaborations

Yabumoto collaborates with talented colleagues, including Akiko Satoh and Zhengjun Zhang. Their combined efforts contribute to the innovative environment at Fujitsu Semiconductor Limited.

Conclusion

Noriko Yabumoto's contributions to logic equivalence verification highlight her role as a leading inventor in the field. Her innovative patent and collaborative spirit continue to drive advancements in semiconductor technology.