The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 28, 2011
Filed:
Apr. 01, 2008
Noriko Yabumoto, Kawasaki, JP;
Akiko Satoh, Kawasaki, JP;
Zhengjun Zhang, Kawasaki, JP;
Takashi Matsuura, Kawasaki, JP;
Noriko Yabumoto, Kawasaki, JP;
Akiko Satoh, Kawasaki, JP;
Zhengjun Zhang, Kawasaki, JP;
Takashi Matsuura, Kawasaki, JP;
Fujitsu Semiconductor Limited, Yokohama, JP;
Abstract
A verification apparatus that verifies whether a reference circuit and an implemented circuit are logically equivalent deletes, respectively therefrom, all buffers and an even number of inverters between flip-flops. On each of the circuits, the apparatus further deletes and merges a flip-flop to another flip-flop that is logically equivalent. The name of the deleted flip-flip is added to the name of the flip-flop to which it is merged. The apparatus compares all of the names of the flip-flops and pairs the flip-flops by name. From the input pin of each of the paired flip-flops, logic cones are defined and using these logic cones, comparison of and verification between the reference circuit and the implemented circuit is performed.