Bengaluru, India

Naveen Miriyalu

This inventor holds 1 USPTO granted patent. Top assignee: International Business Machines Corporation. Active years: 2020.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Naveen Miriyalu. Retrieved from https://idiyas.com/inventor/naveen-miriyalu

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile


Average Co-Inventor Count = 3.0

ph-index = 1

Forward Citations = 1(Granted Patents)


Company Filing History:


Years Active: 2020

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1 patent (USPTO):Explore Patents

Title: Innovator Naveen Miriyalu: Pioneering Cache Optimization at IBM

Introduction: Naveen Miriyalu is an accomplished inventor based in Bengaluru, India. He has made significant contributions to the field of cache optimization with his innovative approach to minimizing cache miss latency. His remarkable patent exemplifies the importance of efficiency in data processing and technology.

Latest Patents: Naveen holds a patent for a remarkable invention titled "Scope resolution tag buffer to reduce cache miss latency." This patent introduces a method that effectively manages cache misses using a Scope Resolution Tag Buffer (SRTB). The invention involves a cache controller that assigns an n-bit value to each data block in the Level 2 (L2) cache, which represents the number of times the block has been accessed. Upon accessing the data block, the n-bit value is incremented, enhancing the cache's efficiency. The controller evicts specific data blocks from the L2 cache and stores their addresses in the SRTB, facilitating quick access during subsequent cache misses.

Career Highlights: Naveen Miriyalu is currently employed at the International Business Machines Corporation (IBM), a global leader in technology and consulting. His role at IBM allows him to apply his inventive skills in a collaborative and innovative environment.

Collaborations: Throughout his career, Naveen has had the privilege of collaborating with distinguished colleagues, including Srinivas Bangalore Purushotham and Venkata K Tavva. Working alongside such talented individuals has likely contributed to his success and the advancement of innovative solutions in the technology sector.

Conclusion: Naveen Miriyalu stands out as a significant figure in the realm of technology and invention. His groundbreaking patent involving cache optimization not only showcases his inventive prowess but also highlights the critical role of innovation in enhancing technology. As he continues to work at IBM, his contributions are poised to drive further advancements in the field, paving the way for more efficient data processing solutions in the future.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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