The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 10831659 B1

PDF
Full Text
Expired
Date of Patent:
Nov. 10, 2020

Filed:

Sep. 28, 2018
Applicant:

International Business Machines Corporation, Armonk, NY (US);

Inventors:

Srinivas B. Purushotham, Bangalore, IN;

Naveen Miriyalu, Bangalore, IN;

Venkata K. Tavva, Hyderabad, IN;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 12/0811 (2016.01); G06F 12/0891 (2016.01); G06F 12/0895 (2016.01); G06F 12/0888 (2016.01);
U.S. Cl.
CPC ...
G06F 12/0811 (2013.01); G06F 12/0888 (2013.01); G06F 12/0891 (2013.01); G06F 12/0895 (2013.01); G06F 2212/1021 (2013.01);
Abstract

A method handles cache misses using a Scope Resolution Tag Buffer (SRTB). A cache controller assigns each data block in L2 cache with an n-bit value, where the n-bit value describes a quantity of occurrences in which the data block has been accessed, and where the cache controller increments the n-bit value in one or more data blocks in the first level memory cache each time the one or more data blocks are accessed. The cache controller evicts a particular data block from the L2 cache, and stores a particular data block address where the particular data block is now stored in a Scope Resolution Tag Buffer (SRTB). The information in the SRTB is used to locate which cache or memory contains the particular data block in the event of a subsequent cache miss in the L2 cache.


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