Kanpur, India

Naveen Chandra Srivastava

This inventor holds 2 USPTO granted patents. Top assignee: Advanced Micro Devices Corporation. Active years: 2017-2018.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Naveen Chandra Srivastava. Retrieved from https://idiyas.com/inventor/naveen-chandra-srivastava

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile


% Patents Active = 100.0

Average Co-Inventor Count = 4.4

ph-index = 1

Forward Citations = 2(Granted Patents)


Company Filing History:


Years Active: 2017-2018

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2 patents (USPTO):Explore Patents

Title: Innovations by Naveen Chandra Srivastava

Introduction

Naveen Chandra Srivastava is a notable inventor based in Kanpur, India. He has made significant contributions to the field of semiconductor technology, holding 2 patents that showcase his innovative approach to solving complex engineering problems.

Latest Patents

One of his latest patents focuses on reducing the load on the bitlines of a ROM bitcell array. This patent describes systems, apparatuses, and methods for optimizing the connections between nets of a ROM bitcell array based on their programmed values. The approach includes performing a series of optimizations to enhance the efficiency of the bitcell array. A first optimization involves swapping the connections between ground and bitline for nets in a given column when the number of connections to the bitline exceeds those to ground. A second optimization removes the connection of a net to a bitline if three consecutive nets in a column are connected to that bitline.

Another significant patent addresses the use of a cut mask to form spaces representing spacing violations in a semiconductor structure. This patent outlines systems, apparatuses, and methods for reducing the area of a semiconductor structure. It details the process of detecting spacing violations for gap widths that separate regions of semiconductor material. Upon detection, the regions are merged, and a cut mask layer is formed above the combined region. An etch process is then performed to remove an exposed third region within the combined region.

Career Highlights

Naveen Chandra Srivastava is currently employed at Advanced Micro Devices Corporation, a leading company in the semiconductor industry. His work at AMD has allowed him to apply his innovative ideas and contribute to the advancement of technology in this field.

Collaborations

Throughout his career, Naveen has collaborated with talented individuals such as Janardhan Achanta and Shreekanth Karandoor Sampigethaya. These collaborations have further enriched his work and contributed to the success of his projects.

Conclusion

Naveen Chandra Srivastava is a distinguished inventor whose patents reflect his commitment to innovation in semiconductor technology. His contributions continue to influence the industry and pave the way for future advancements.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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