Gunma, Japan

Naota Tate

This inventor holds 1 USPTO granted patent. Top assignee: Shin-Etsu Handotai Co., Ltd.. Active years: 2007.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Naota Tate. Retrieved from https://idiyas.com/inventor/naota-tate

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile


% Patents Active = 100.0

Average Co-Inventor Count = 4.0

ph-index = 1

Forward Citations = 3(Granted Patents)


Company Filing History:


Years Active: 2007

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1 patent (USPTO):Explore Patents

Title: Naota Tate: Innovator in SOI Wafer Production

Introduction

Naota Tate is a prominent inventor based in Gunma, Japan. He is known for his significant contributions to the field of semiconductor technology, particularly in the production of Silicon-On-Insulator (SOI) wafers. His innovative methods have paved the way for advancements in the manufacturing processes of these essential components.

Latest Patents

Naota Tate holds a patent for a "Method for producing SOI wafer and SOI wafer." This patent describes a method that utilizes the hydrogen ion delamination technique. The process involves bonding a base wafer with a bond wafer that has a micro bubble layer formed through gas ion implantation. A key aspect of this method is the delamination of a wafer with an SOI layer at the micro bubble layer boundary. After the delamination, the wafer undergoes a two-stage heat treatment in an atmosphere containing hydrogen or argon, utilizing a rapid heating/rapid cooling apparatus (RTA) and a batch processing type furnace. This innovative approach improves the surface roughness of the SOI layer and efficiently produces SOI wafers free from pit generation due to crystal-originated particles (COPs) with high throughput.

Career Highlights

Naota Tate has made significant strides in his career, particularly through his work at Shin-Etsu Handotai Co., Ltd. His expertise in semiconductor manufacturing has been instrumental in enhancing the quality and efficiency of SOI wafer production. With a focus on innovation, he has contributed to the advancement of technologies that are critical to the electronics industry.

Collaborations

Naota Tate has collaborated with notable colleagues, including Hiroji Aga and Susumu Kuwabara. These partnerships have fostered a collaborative environment that encourages the exchange of ideas and the development of cutting-edge technologies in the semiconductor field.

Conclusion

Naota Tate's contributions to the production of SOI wafers exemplify the impact of innovative thinking in technology. His patented methods not only enhance manufacturing processes but also contribute to the overall advancement of semiconductor technology.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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