Tokyo, Japan

Naoko Takenouchi

This inventor holds 2 USPTO granted patents. Top assignee: Kabushiki Kaisha Toshiba. Active years: 1991-1992.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Naoko Takenouchi. Retrieved from https://idiyas.com/inventor/naoko-takenouchi

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile


% Patents Active = 100.0

Average Co-Inventor Count = 3.0

ph-index = 2

Forward Citations = 23(Granted Patents)


Company Filing History:


Years Active: 1991-1992

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2 patents (USPTO):Explore Patents

Title: Naoko Takenouchi: Innovator in Semiconductor Technology

Introduction

Naoko Takenouchi is a prominent inventor based in Tokyo, Japan. She has made significant contributions to the field of semiconductor technology, holding a total of 2 patents. Her work focuses on enhancing the performance and efficiency of semiconductor devices.

Latest Patents

One of her latest patents is titled "A P channel MIS type semiconductor device." This invention features P type source and drain regions formed in an N type semiconductor substrate. The design includes low and high impurity concentration layers, with channel side edges of the low concentration impurity layers arranged inside the high concentration impurity layers. This double layer source and drain structure effectively prevents offset gate construction and reduces parasitic resistance.

Another notable patent is "Field effect transistor with lightly doped drain structure and method." This patent discloses a semiconductor integrated circuit device that includes an MOSFET with a lightly doped drain (LLD) structure. The gate electrode layer is insulatively provided above a semiconductor substrate of p conductivity type. The source and drain layers of n conductivity type are formed in a manner that is substantially self-aligned with the gate electrode. This innovative design increases the punch-through voltage level by enhancing the effective channel length of the MOSFET.

Career Highlights

Naoko Takenouchi is associated with Kabushiki Kaisha Toshiba, a leading company in the technology sector. Her work at Toshiba has been instrumental in advancing semiconductor technologies, contributing to the company's reputation for innovation and excellence.

Collaborations

Throughout her career, Naoko has collaborated with notable colleagues, including Katsuhiko Hieda and Kazumasa Sunouchi. These collaborations have further enriched her research and development efforts in the semiconductor field.

Conclusion

Naoko Takenouchi's contributions to semiconductor technology through her innovative patents and work at Toshiba highlight her as a key figure in the industry. Her inventions continue to influence the development of advanced semiconductor devices, showcasing her expertise and dedication to innovation.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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