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Naoki Yamauchi

This inventor holds 4 USPTO granted patents. Top assignee: Mitsubishi Denki Kabushiki Kaisha. Active years: 1992-1995.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Naoki Yamauchi. Retrieved from https://idiyas.com/inventor/naoki-yamauchi

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 4

% Patents Active = 100.0

Average Co-Inventor Count = 1.3

ph-index = 3

Forward Citations = 119(Granted Patents)

Location History:

Hyogo, JP (1993 - 1994)
Itami, JP (1992 - 1995)

Company Filing History:

4 out of 21,351

Mitsubishi Denki Kabushiki Kaisha

Years Active: 1992-1995

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4 patents (USPTO):Sort by Forward CitationsExplore Patents

1. 5428309 - Delay circuit (1995-06-27),

2. 5353435 - Microcomputer with circuit for generating multiple pulses each having (1994-10-04),

3. 5243561 - Data erasing and re-writing circuit for use in microcomputer integrated (1993-09-07),

4. 5097445 - Semiconductor integrated circuit with selective read and write inhibiting (1992-03-17),

Profile summary based on public USPTO records.

Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]

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